| PART |
Description |
Maker |
| NC7WV16P6X NC7WV16 NC7WV16L6X |
TinyLogic ULP-A Dual Buffer
TinyLogicR ULP-A Dual Buffer
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SP17P5X NC7SP17 NC7SP17L6X |
TinyLogic ULP Single Buffer with Schmitt Trigger Input
TinyLogic ULP Single Buffer with Schmitt Trigger Input
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SV125_04 NC7SV125 NC7SV125L6X NC7SV125P5X NC7SV |
TinyLogic ULP-A Buffer with 3-STATE Output
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SV17_04 NC7SV17 NC7SV17L6X NC7SV17P5X |
TinyLogic ULP-A Single Buffer with Schmitt Trigger Input
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SV17 NC7SV17P5X NC7SV17L6X |
TinyLogic. ULP-A Single Buffer with Schmitt Trigger Input
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SP158L6X NC7SP158P6X NC7SP158 |
TinyLogic ULP 2-Input Inverting Multiplexer P SERIES, 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, DSO6
TinyLogic ULP 2-Input Inverting Multiplexer
TinyLogic ULP 2-Input Inverting Multiplexer
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WZ07P6X NC7WZ07 NC7WZ07L6X |
TinyLogic UHS Dual Buffer (Open Drain Outputs) LVC/LCX/Z SERIES, DUAL 1-INPUT NON-INVERT GATE, PDSO6
TinyLogic UHS Dual Buffer (Open Drain Outputs)
TinyLogic UHS Dual Buffer (Open Drain Outputs)
|
Fairchild Semiconductor, Corp.
FAIRCHILD[Fairchild Semiconductor]
|
| NC7WP02 NC7WP02K8X NC7WP02L8X |
TinyLogic ULP Dual 2-Input NOR Gate
|
Fairchild Semiconductor
|
| NC7WP08-05 |
TinyLogic ULP Dual 2-Input AND Gate
|
Fairchild Semiconductor
|
| NC7WV14P6X NC7WV14 NC7WV14L6X |
TinyLogic ULP-A Dual Inverter with Schmitt Trigger Input
|
FAIRCHILD[Fairchild Semiconductor]
|
| NC7SVU04P5X NC7SVU04 NC7SVU04L6X |
TinyLogic ULP-A Unbuffered Inverter
TinyLogic ULP-A Unbuffered Inverter
|
Fairchild Semiconductor Corporation
FAIRCHILD[Fairchild Semiconductor]
|
